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? 2009 semtech corporation power management us patents: 6,504,422; 6,794,926 typical application circuit SC658 backlight driver for 4 leds with sempulse tm interface sc 658 in spif gnd out bl 1 c in 2 . 2 f c 1 + from microprocessor v bat = 2 . 9 to 5 . 5 v c out 2 . 2 f c 2 2 . 2 f c 1 2 . 2 f bl 2 bl 3 bl 4 c 2 + c 1 - c 2 - features input supply voltage range 2.9v to 5.5v very high efciency charge pump driver system with three modes x, .5x and 2x four programmable current sinks 0ma to 25ma up to three led grouping options fade-in/fade-out feature for main led bank charge pump frequency 250khz sempulse single wire interface backlight current accuracy .5% typical backlight current matching 0.5% typical led foat detection automatic sleep mode (leds of ) i q = 60a (typ.) shutdown current 0. a (typical) ultra-thin package 2 x 2 x 0.6 (mm) fully weee and rohs compliant applications cellular phones, smart phones, and pdas lcd modules portable media players digital cameras personal navigation devices display/keypad backlighting and led indicators ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? description the SC658 is a high efciency charge pump led driver using semtechs proprietary charge pump technology. performance is optimized for use in single-cell li-ion battery applications. the charge pump provides backlight current utilizing four matched current sinks. the load and supply conditions determine whether the charge pump operates in x, .5x, or 2x mode. an optional fading feature that gradually adjusts the backlight current is provided to simplify control software. the SC658 uses the proprietary sempulse tm single wire interface to control all functions of the device, including backlight currents. the single wire interface minimizes microcontroller and interface pin counts. the four leds can be grouped in up to three separate banks that can be independently controlled. the SC658 enters sleep mode when all the led drivers are disabled. in this mode, the quiescent current is reduced while the device continues to monitor the sempulse interface. with a 2 x 2 (mm) package and four small capacitors, the SC658 provides a complete led driver solution with a minimal pcb footprint. april 3, 2009
2 pin confguration marking information ordering information notes: () available in tape and reel only. a reel contains 3,000 devices. (2) lead-free package only. device is weee and rohs compliant. mlpq-ut-14;f2x2,f14flead ja f=f127c/w SC658 top view 1 2 3 8 9 10 4 5 6 7 14 13 12 11 bl 3 c 2 + s p i f b l 2 nc bl 4 b l 1 i n o u t c 1 + c 1 - n c g n d c 2 - device package SC658ultrt ()(2) mlpq-ut- 4 22 SC658evb evaluation board ... ag yw agf=fmarkingfcodefforfSC658 ywf=fdatefcode
3 exceeding the above specifcations may result in permanent damage to the device or device malfunction. operation outside of the parameters specifed in the electrical characteristics section is not recommended. notes: () tested according to jedec standard jesd22-a 4 (2) ?v f(max) = .0v when v in = 2.9v, higher v in supports higher ?v f(max) (3) calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer fr4 pcb per jesd5 standards. absolute maximum ratings in, out (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 c +, c2+ (v) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (v out + 0.3) pin voltage all other pins (v) . . . . . . . . -0.3 to (v in + 0.3) out short circuit duration . . . . . . . . . . . . . . . . continuous esd protection level () (kv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 unless otherwise noted, t a = +25c for typ, -40c to +85c for min and max, t j(max) = 25c, v in = 3.7 v, c in = c = c 2 = c out = 2.2f (esr = 0.03) () electrical characteristics recommended operating conditions ambient temperature range (c) . . . . . . . . -40 t a +85 input voltage (v) . . . . . . . . . . . . . . . . . . . . . . . 2.9 v in 5.5 output voltage (v) . . . . . . . . . . . . . . . . . . . . . 2.5 v out 5.25 voltage diference between any two leds (v). . ?v f < .0 (2) thermal information thermal resistance, junction to ambient (3) (c/w) . . 27 maximum junction temperature (c) . . . . . . . . . . . . . . . + 50 storage temperature range (c) . . . . . . . . . . . -65 to + 50 peak ir refow temperature ( 0s to 30s) (c) . . . . . . +260 SC658 parameter symbol conditions min typ max units shutdown current i q(off) 0. 2 a total quiescent current i q all outputs disabled, spif = v in (2) 60 00 a charge pump enabled, x mode, all leds on, i bln = 0.5ma .4 ma charge pump in x mode, 2.9v 2.9v, sum of all active led currents, v out(max) = 4.2v 00 ma backlight current setting i bln nominal setting for bl thru bl4 0 25 ma backlight current matching i bl-bl i bln = 2ma (3) -3.5 0.5 +3.5 % backlight current accuracy i bl_acc i bln = 2ma -8 .5 +8 %
4 electrical characteristics (continued) SC658 parameter symbol conditions min typ max units x mode to .5x mode falling transition input voltage v trans x i out = 40ma, i bln = 0ma, v out = 3.2v 3.24 v .5x mode to x mode hysteresis v hyst x i out = 40ma, i bln = 0ma, v out = 3.2v 250 mv .5x mode to 2x mode falling transition input voltage v trans .5x i out = 40ma, i bln = 0ma, v out = 4.2v (4) 3.07 v current sink of-state leakage current i bln(of ) v in = v bln = 4.2v 0. a charge pump frequency f pump v in = 3.2v 250 khz output short circuit current limit i out(sc) out pin shorted to gnd 60 ma v out > 2.5v 300 under voltage lockout v uvlo-off increasing v in , lock-out released 2.7 v v uvlo-hys hysteresis 800 mv over-voltage protection v ovp out pin open circuit, v out = v ovp , rising threshold 5.7 6.0 v over-temperature t ot rising temperature 60 c ot hysteresis t ot-hys 20 c
5 electrical characteristics (continued) SC658 parameter symbol conditions min typ max units sempulse interface input high threshold v ih v in = 5.5v .6 v input low threshold v il v in = 2.9v 0.4 v input high current i ih v in = 5.5v - + a input low current i il v in = 5.5v - + a start up time (5) t su only required when leaving shutdown mode ms bit pulse duration (6) t hi 0.75 250 s duration between pulses (6) t lo 0.75 250 s hold time - address (6) t holda software limit spif must be held high for this amount of time to latch the data 550 5000 s hold time - data (6) t holdd software limit spif must be held high for this amount of time to latch the address 550 s bus reset time (6) t br software limit spif must be held high for this amount of time to force a bus system reset 2 ms shutdown time (7) t sd software limit spif must be held low for this amount of time to disable device 0 ms notes: () capacitors are mlcc of x5r type. production tested with higher value capacitors than the application requires (2) spif is high for more than 0ms to place serial bus in standby mode (3) current matching is defned as [i bl(max) - i bl(min ] / [i bl(max) + i bl(min) ]. (4) test voltage is v out = 4.2v a relatively extreme led voltage to force a transition during test. typically v f = 3.2v for white leds. (5) the sempulse start-up time is the minimum time that the spif pin must be held high to enable the part before starting communication. (6) the source driver used to provide the sempulse output must meet these limits. (7) the sempulse shutdown time is the minimum time that the spif pin must be pulled low to shut the part down.
6 typical characteristics SC658 all data taken with t a = +25 c, v in = 3.7v, c in = c = c 2 = c out = 2.2f (esr = 0.03?) unless otherwise noted. backlightfefciencyf(4fleds)ff25mafeach 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 v in ( v ) e f f i c i e n c y ( % ) c in = c out = 4 . 7 f , v out = 3 . 61 v 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 v in ( v ) e f f i c i e n c y ( % ) v out = 3 . 44 v - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 c in = c out = 4 . 7 f v in ( v ) m a t c h i n g ( % ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 v in ( v ) e f f i c i e n c y ( % ) v out = 3 . 27 v - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 v in ( v ) m a t c h i n g ( % ) backlightfmatchingf(4fleds)ff4.5mafeach - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 v in ( v ) m a t c h i n g ( % ) backlightfefciencyf(4fleds)ff12mafeach backlightfmatchingf(4fleds)ff12mafeach backlightfmatchingf(4fleds)ff25mafeach backlightfefciencyf(4fleds)ff4.5mafeach
7 typical characteristics (continued) SC658 backlightfaccuracyf(4fleds)ff12mafeach - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 a cc max % a cc min % v in ( v ) a c c u r a c y ( % ) rippleff2xfmode 20s?div s?div ?div v in (00mv/div) v out (00mv/div) i bl (0ma/div) c in = c out = 4.7f, v in = 2.9v, 4 leds 5ma each rippleff1xfmode 20s?div s?div ?div v in (00mv/div) v out (00mv/div) i bl (0ma/div) c in = c out = 4.7f, 4 leds, 5ma each rippleff1.5xfmode 20s?div s?div ?div v in (00mv/div) v out (00mv/div) i bl (0ma/div) outputfshortfcircuitfcurrentflimit 1ms?div s?div ?div v out (v/div) i out (50ma/div) 0 0 c in = c out = 4.7f, v in = 2.9v, 4 leds, 5ma each outputfopenfcircuitfprotection 20s?div s?div ?div v bl (500mv/div) v out (v/div) i bl (0ma/div) 0
8 pin descriptions SC658 pin # pin name pin function bl3 current sink output for main backlight led 3 leave this pin open if unused 2 bl4 current sink output for main backlight led 4 leave this pin open if unused 3 nc no connection 4 nc no connection 5 spif sempulse single wire interface pin used to enable/disable the device and to confgure all regis - ters (refer to register map and sempulse interface sections) 6 gnd ground pin 7 c2- negative connection to bucket capacitor 2 8 c- negative connection to bucket capacitor 9 c+ positive connection to bucket capacitor 0 c2+ positive connection to bucket capacitor 2 out charge pump output all led anode pins should be connected to this pin 2 in battery voltage input 3 bl current sink output for main backlight led leave this pin open if unused 4 bl2 current sink output for main backlight led 2 leave this pin open if unused
9 block diagram SC658 oscillator current setting dac sempulse digital interface and logic control fractional charge pump ( 1 x , 1 . 5 x , 2 x ) c 1 + c 1 - c 2 + c 2 - out bl 1 bl 2 bl 3 bl 4 in spif gnd 9 7 10 8 12 5 6 11 13 14 1 2 nc nc 3 4
0 applications information SC658 general description this design is optimized for handheld applications sup - plied from a single li-ion cell and includes the following key features: a high efciency fractional charge pump that supplies power to all leds four matched current sinks that control led backlighting current, providing 0ma to 25ma per led leds can be grouped in up to three indepen - dently controlled banks high current fractional charge pump the backlight outputs are supported by a high efciency, high current fractional charge pump output. the charge pump multiplies the input voltage by x, .5x, or 2x. the charge pump switches at a fxed frequency of 250khz in .5x and 2x modes and is disabled in x mode to save power and improve efciency. the mode selection circuit automatically selects the mode as x, .5x, or 2x based on circuit conditions such as led voltage, input voltage, and load current. the x mode is the most efcient of the three modes, followed by .5x and 2x modes. circuit conditions such as low input voltage, high output current, or high led voltage place a higher demand on the charge pump output. a higher numerical mode ( .5x or 2x) may be needed momentarily to main - tain regulation at the out pin during intervals of high demand. the charge pump responds to momentary high demands, setting the charge pump to the optimum mode to deliver the output voltage and load current while opti - mizing efciency. hysteresis is provided to prevent mode toggling. the charge pump requires two bucket capacitors for proper operation. one capacitor must be connected between the c + and c - pins and the other must be connected between the c2+ and c2- pins as shown in the typical application circuit diagram. these capacitors should be equal in value, with a minimum capacitance of f to support the charge pump current requirements. the device also requires at least f of capacitance on the in pin and at least f of capacitance on the out ? ? ? pin to minimize noise and support the output current requirements of up to 90ma. for output currents higher than 90ma, a nominal value of 4.7f is recommended for c out and c in . capacitors with x7r or x5r ceramic dielectric are strongly recommended for their low esr and superior temperature and voltage characteristics. y5v capacitors should not be used as their temperature coefcients make them unsuitable for this application. it is important to ensure the minimum capacitance value of each capacitor does not drop below f. this may require the use of 2.2f capacitors to be sure that the degradation of capacitance due to dc voltage does not cause the capacitance to go below f. led backlight current sinks the backlight current is set via the sempulse interface. the current is regulated to one of 29 values between 0ma and 25ma. the step size varies depending upon the current setting. between 0ma and 5ma, the step size is 0.5ma. the step size increases to ma for settings between 5ma and 2 ma. steps are 2ma between 2 ma and 25ma. the variation in step size allows fner adjustment for dimming functions in the low current setting range and coarse adjustment at higher current settings where small current changes are not visibly noticeable in led brightness. a zero setting is also included to allow the current sink to be disabled by writing to either the enable bit or the current setting register for maximum fexibility. all backlight current sinks have matched currents, even when there is a variation in the forward voltages (?v f ) of the leds. a ?v f diference of .0v is supported when the input voltage is at 2.9v. higher ?v f led mis-match is sup - ported when v in is higher than 2.9v. all current sink outputs are compared and the lowest output is used for setting the voltage regulation at the out pin. this is done to ensure that sufcient bias exists for all leds. the backlight leds default to the of state upon power-up. for backlight applications using less than four leds, any unused output must be left open and the unused led must remain disabled. when writing to the backlight enable register, a zero (0) must be written to the corresponding bit of any unused output.
applications information (continued) SC658 backlight quiescent current the quiescent current required to operate all backlights is reduced when the backlight current is set to 4.0ma or less. this feature results in higher efciency under light-load conditions. further reduction in quiescent current will result from using fewer than the maximum number of leds. led banks the leds can be grouped in up to three independently controlled led banks. using the sempulse interface, the four led drivers can be grouped as described in the backlight grouping confguration subsection. the banks can be used to provide up to three different current options. this can be useful for controlling keypad, display, and auxiliary backlight operation from one SC658 device. the led banks provide versatility by allowing backlights to be controlled independently. for example, applications that have a main and sub display may also need to supply an indicator led. the three bank option allows the SC658 to control each function with diferent current settings. another application involves backlighting two displays and a keypad, each requiring diferent brightness settings. a third scenario requires supplying diferent brightness levels to diferent types of leds (such as rgb) to create display efects. in all applications, the brightness level for each led can be set independently. backlight fade-in / fade-out function the SC658 contains bits that control the fade state of the main bank. when enabled, the fade function causes the backlight settings to step from their current state to the next programmed state as soon as the new state is stored in its register. for example, if the backlight is set at 25ma and the next setting is the of state, the backlight will step from 25ma down to 0ma using all settings at the fade rate specifed by the bits in register 04h. the same is true when turning on or increasing the backlight current the backlight current will step from the present level to the new level at the step rate defned in register 04h. this process applies to the main display only. the fade rate may be changed dynamically when a fade operation is active by writing new values to the fade reg - ister. when a new backlight level is written during an ongoing fade operation, the fade will be redirected to the new value from the present state. an ongoing fade opera - tion may be cancelled by disabling fade which will result in the backlight current changing immediately to the fnal value. if fade is disabled, the current level will change immediately without the fade delay. the state diagram in figure describes the fade opera - tion. more details can be found in the register map section. write fade = 0 write new bright level fade = 0 no change write fade = 0 fade = 1 fade processing ( 1 ) write new bright level write new bright level fade is redirected toward the new value from current state fade begins fade ends write fade = 1 fade = 1 fade = 0 immediate change to new bright level fade = 0 write fade = 1 no change write fade = 1 no change immediate change to new bright level write new fade rate continue fade using new rate note : ( 1 ) when the data in backlight enable register 00 h is not 00 h figure 1 state diagram for fade function fade-in from of state when the initial state of the main backlight current regis - ter is 00h (the data value for 0ma), fading to an on state is accomplished by following the steps listed in table . following these steps explicitly will ensure that the fade- in operation will proceed with no interruption at the rate specifed in the main fade register (04h). this procedure
2 applications information (continued) SC658 must be followed regardless of which backlight grouping confguration is being used. note that it is only necessary to set the blen bits for the main display. tablef1fffade-inffromfoffstate command sequence action data disable fade . write to register 04h 00h set main back- lights to 0.5ma 2. write to register 0 h 04h enable fade 3. write to register 04h 0h, 02h, or 03h set blen bits 4. write to register 00h any value from 0 h through 3fh set new value of backlight current 5. write to register 0 h any value from 05h through fh fade-out from any on state to of state fading the backlight leds from any active state to the of state follows a simple procedure. the sequence of com - mands for this action is shown in table 2. following these steps explicitly will ensure that the fade-out operation will proceed with no interruption at the rate specifed in the main fade register (04h). this procedure must be followed regardless of the backlight grouping confguration. tablef2fffade-outffromfanyfonfstateftofoffstate command sequence action data enable fade . write to register 04h 0h, 02h, or 03h (but not 00h) set main back- lights to 0ma 2. write to register 0 h 00h fading between diferent on states fading from one backlight level to another (up or down) also follows a simple procedure. the sequence of com - mands for this action is shown in table 3. following these steps explicitly will ensure that the fade-in/fade-out oper - ation will proceed with no interruption at the rate specifed in the main fade register (04h). this procedure must be followed regardless of the backlight grouping confguration. tablef3fffadingfbetweenfdiferentfonfstatesf command sequence action data enable fade . write to register 04h 0h, 02h, or 03h set new value of backlight current 2. write to register 0 h any value from 05h through fh additional information for more details about the fade-in/fade-out function, refer to the SC658 backlight driver software users guide and sempulse interface specifcation document and to the associated software drivers available for this device (contact your sales ofce for more details). shutdown mode the device is disabled when the spif pin is held low for the shutdown time specifed in the electrical characteris - tics section. all registers are reset to default condition at shutdown. sleep mode when all leds are disabled, sleep mode is activated. this is a reduced current mode that helps minimize overall current consumption by disabling the clock and the charge pump while continuing to monitor the serial inter - face for commands. an additional current savings can be obtained by putting the serial interface in standby mode (see sempulse interface, standby mode). protection features the SC658 provides several protection features to safe - guard the device from catastrophic failures. these features include: output open circuit protection over-temperature protection charge pump output current limit led float detection output open circuit protection over-voltage protection (ovp) at the out pin prevents the charge pump from producing an excessively high output voltage. in the event of an open circuit between the out pin and all current sinks (no loads connected), the charge ? ? ? ?
3 applications information (continued) SC658 pump runs in open loop and the voltage rises up to the ovp limit. ovp operation is hysteretic, meaning the charge pump will momentarily turn off until v out is sufficiently reduced. the maximum ovp threshold is 6.0v, allowing the use of a ceramic output capacitor rated at 6.3v. over-temperature protection the over-temperature (ot) protection circuit prevents the device from overheating and experiencing a catastrophic failure. when the junction temperature exceeds 6 0 c, the device goes into thermal shutdown with all outputs dis - abled until the junction temperature is reduced. all regis - ter information is retained during thermal shutdown. hysteresis of 20 c is provided to ensure that the device cools sufciently before re-enabling. charge pump output current limit the device limits the charge pump current at the out pin. if the out pin is shorted to ground, or v out is lower than v uvlo , the typical output current limit is 60ma. the output current is limited to 300ma when over loaded resistively with v out greater than 2.5v. led float detection float detect is a fault detection feature of the led back - light outputs. if an output is programmed to be enabled and an open circuit fault occurs at any backlight output, that output will be disabled to prevent a sustained output ovp condition from occurring due to the resulting open loop. float detect ensures device protection but does not ensure optimum performance. unused led outputs must be disabled to prevent an open circuit fault from occurring. thermal management although the SC658 can provide up to 00ma output current, the maximum thermal temperature and the thermal resistance ( ja ) of the package and layout may limit the output current. thermal resistance can be lowered by following the recommended layout guidelines in pcb layout considerations, as illustrated in figure 2. pcb layout considerations following fundamental layout rules is critical for achieving the performance specifed in the electrical characteristics table. the following guidelines are recommended when developing a pcb layout: place all capacitors (c , c2, cin, and cout) as close to the device as possible. all charge pump current passes through the in/ out and the bucket capacitor connection pins. ensure that all connections to these pins make the of wide traces so that the resistive drop on each connection is minimized. make all ground connections to a solid ground plane as shown in the example layout . figuref2f fsuggestedflayout ? ? ?
4 SC658 sempulse tm interface introduction sempulse is a write-only single wire interface. it provides the capability to access up to 32 registers that control device functionality. two sets of pulse trains are transmit - ted via the spif pin. the frst pulse set is used to set the desired address. after the bus is held high for the address hold period, the next pulse set is used to write the data value. after the data pulses are transmitted, the bus is held high again for the data hold period to signify the data write is complete. at this point the device latches the data into the address that was selected by the frst set of pulses. see the sempulse timing diagrams for descriptions of all timing parameters. chip enable/disable the device is enabled when the sempulse interface pin (spif) is pulled high for greater than t su . if the spif pin is pulled low again for more than t sd , the device will be disabled. address writes the frst set of pulses can range between 0 and 3 (or to 32 rising edges) to set the desired address. after the pulses are transmitted, the spif pin must be held high for t holda to signal to the slave device that the address write is fnished. if the pulse count is between 0 and 3 and the line is held high for t holda , the address is latched as the destination for the next data write. if the spif pin is not held high for t holda , the slave device will continue to count pulses. note that if t holda exceeds its maximum specifca - tion, the bus will reset. this means that the communication is ignored and the bus resumes monitoring the pin, expecting the next pulse set to be an address. if the total exceeds 3 pulses, spif must be held high until the bus reset time t br is exceeded before commencing communication. data writes after the bus has been held high for the minimum address hold period, the next set of pulses are used to write the data value. the total number of pulses can range from 0 to 63 (or to 64 rising edges) since there are a total of 6 register bits per register. just like with the address write, the data write is only accepted if the bus is held high for t holdd when the pulse train is completed. if the proper hold time is not received, the interface will keep counting pulses until the hold time is detected. if the total exceeds 63 pulses, the write will be ignored and the bus will reset after the next valid hold time is detected. after the bus has been held high for t holdd , the bus will expect the next pulse set to be an address write. note that this is the same efect as the bus reset that occurs when t holda exceeds its maximum specification. for this reason, there is no maximum limit on t holdd the bus simply waits for the next valid address to be transmitted. multiple writes it is important to note that this single-wire interface requires the address to be paired with its corresponding data. if it is desired to write multiple times to the same address, the address must always be re-transmitted prior to the corresponding data. if it is only transmitted one time and followed by multiple data transmissions, every other block of data will be treated like a new address. the result will be invalid data writes to incorrect addresses. note that multiple writes only need to be separated by the minimum t holdd for the slave to interpret them cor - rectly. as long as t holda between the address pulse set and the data pulse set is less than its maximum specifcation but greater than its minimum, multiple pairs of address and data pulse counts can be made with no detrimental efects. standby mode once data transfer is completed, the spif line must be returned to the high state for at least 0ms to return to the standby mode. in this mode, the spif line remains idle while monitoring for the next command. this mode allows the device to minimize current consumption between commands. once the device has returned to standby mode, the bus is automatically reset to expect the address pulses as the next data block. this safeguard is intended to reset the bus to a known state (waiting for the beginning of a write sequence) if the delay exceeds the reset threshold.
5 SC658 sempulse tm interface (continued) sempulse timing diagrams the sempulse single wire interface is used to enable or disable the device and confgure all registers (see figure 3). the timing parameters refer to the digital i/o electrical specifcations. t lo t hi t = t su t = t holda t = t holdd address is set data is written spif up to 32 rising edges ( 0 to 31 pulses ) up to 64 rising edges ( 0 to 63 pulses ) figuref3ffuniformftimingfdiagramfforfsempulsefcommunication timing example 1 in this example (see figure 4), the slave chip receives two sets of pulses to set the address and data, and the pulses expe - rience interrupts that cause the pulse width to be nonuniform. note that as long as the maximum high and low times are satisfed and the hold times are within specifcation, the data transfer is completed regardless of the number of interrupts that delay the transmission. t hi t lo t < t himax t < t lomax t = t su data written is 000011 spif t = t holda t = t holdd address is set to register 02 h figuref4ffsempulsefdatafwritefwithfnon-uniformfpulsefwidths timing example 2 in this example (see figure 5), the slave chip receives two sets of pulses to set the address and data, but an interrupt occurs during a pulse that causes it to exceed the minimum address hold time. the write is meant to be the value 03h in register 05h, but instead it is interpreted as the value 02h written to register 02h. the extended pulse that is delayed by the interrupt triggers a false address detection, causing the next pulse set to be interpreted as the data set. to avoid any problems with timing, make sure that all pulse widths comply with their timing requirements as outlined in this datasheet. data written is 000010 spif t > t himax t = t holdd address is set to register 02 h interrupt duration t = t holda address is set to register 03 h ( address and data are now out of order ) figuref5fffaultyfsempulsefdatafwritefdueftofextendedfinterruptfduration
6 register map (1) SC658 address d5 d4 d3 d2 d1 d0 reset value description 00h 0 (2) 0 (2) blen4 blen3 blen2 blen 00h backlight enable 0h 0 (2) mbl4 mbl3 mbl2 mbl mbl0 00h main backlight current 02h 0 (2) sbl4 sbl3 sbl2 sbl sbl0 00h sub backlight current 03h 0 (2) tbl4 tbl3 tbl2 tbl tbl0 00h third backlight current 04h 0 (2) 0 (2) 0 (2) 0 (2) mfade mfade0 00h main fade 05h 0 (2) 0 (2) 0 (2) 0 (2) mb mb0 00h backlight grouping confguration defnition of registers and bits bl enable control register (00h) this register enables each individual led. blen4 blen1 [d3:d0] these active high bits enable the four backlight drivers. each led can be controlled independently. notes: () all registers are write-only. (2) 0 = always write a 0 to these bits
7 register and bit defnitions (continued) main backlight current control register (01h) this register is used to set the currents for the backlight current sinks assigned to the main backlight group. this group can also be used to control red leds for limited rgb control. these current sinks need to be enabled in the backlight enable control register to be active. bit d5 this bit is unused and is always a zero, so the maximum pulse count for this register is 3 . mbl4 mbl0 [d4:d0] these bits are used to set the current for the main back - light current sinks. all enabled main backlight current sinks will sink the same current, as shown in table 4. tablef4ffmainfbacklightfcurrentfsettings mbl4 mbl3 mbl2 mbl1 mbl0 backlight current (ma) 0 0 0 0 0 0 0 0 0 0 see note 0 0 0 0 see note 0 0 0 see note 0 0 0 0 0.5 0 0 0 .0 0 0 0 .5 0 0 2.0 0 0 0 0 2.5 0 0 0 3.0 0 0 0 3.5 0 0 4.0 0 0 0 4.5 0 0 5.0 0 0 6.0 0 7.0 0 0 0 0 8.0 0 0 0 9.0 0 0 0 0 0 0 0 0 0 2 0 0 3 0 0 4 0 5 0 0 0 6 0 0 7 0 0 8 0 9 0 0 20 0 2 0 23 25 ( ) reserved for future use SC658
8 register and bit defnitions (continued) sub backlight current control register (02h) this register is used to set the currents for the backlight current sinks assigned to the sub backlight group. this group can also be used to control green leds for limited rgb control. these current sinks need to be enabled in the backlight enable control register to be active. bit d5 this bit is unused and is always a zero, so the maximum pulse count for this register is 3 . sbl4 sbl0 [d4:d0] these bits are used to set the current for the sub backlight current sinks. all enabled sub backlight current sinks will sink the same current, as shown in table 5. tablef5ffsubfbacklightfcurrentfsettings sbl4 sbl3 sbl2 sbl1 sbl0 backlight current (ma) 0 0 0 0 0 0 0 0 0 0 see note 0 0 0 0 see note 0 0 0 see note 0 0 0 0 0.5 0 0 0 .0 0 0 0 .5 0 0 2.0 0 0 0 0 2.5 0 0 0 3.0 0 0 0 3.5 0 0 4.0 0 0 0 4.5 0 0 5.0 0 0 6.0 0 7.0 0 0 0 0 8.0 0 0 0 9.0 0 0 0 0 0 0 0 0 0 2 0 0 3 0 0 4 0 5 0 0 0 6 0 0 7 0 0 8 0 9 0 0 20 0 2 0 23 25 ( ) reserved for future use SC658
9 register and bit defnitions (continued) third backlight current control register (03h) this register is used to set the currents for the backlight current sinks assigned to the third backlight group. this group can also be used to control blue leds for limited rgb control. these current sinks need to be enabled in the backlight enable control register to be active. bit d5 this bit is unused and is always a zero, so the maximum pulse count for this register is 3 . tbl4 tbl0 [d4:d0] these bits are used to set the current for the third back - light current sinks. all enabled third backlight current sinks will sink the same current, as shown in table 6. tablef6ffthirdfbacklightfcurrentfcontrolfbits tbl4 tbl3 tbl2 tbl1 tbl0 backlight current (ma) 0 0 0 0 0 0 0 0 0 0 see note 0 0 0 0 see note 0 0 0 see note 0 0 0 0 0.5 0 0 0 .0 0 0 0 .5 0 0 2.0 0 0 0 0 2.5 0 0 0 3.0 0 0 0 3.5 0 0 4.0 0 0 0 4.5 0 0 5.0 0 0 6.0 0 7.0 0 0 0 0 8.0 0 0 0 9.0 0 0 0 0 0 0 0 0 0 2 0 0 3 0 0 4 0 5 0 0 0 6 0 0 7 0 0 8 0 9 0 0 20 0 2 0 23 25 ( ) reserved for future use SC658
20 register and bit defnitions (continued) SC658 main fade control (04h) this register sets the fade status and rate for the main backlight group. bits [d5:d2] these bits are unused and are always zeros, so the maximum pulse count for this register is 3. mfade1, mfade0[d1:d0] these bits are used to enable and set the rise/fall rate between two backlight currents as follows in table 7. tablef7ffmainfdisplayffadefcontrolfbits mfade1 mfade0 fade feature rise ? fall rate (ms? step) 0 0 off 0 8 0 6 32 the number of steps used to change the backlight current will be equal to the change in binary count of bits mbl[4:0]. when a new backlight current is set, the backlight current will change from its current value to a new value set by bits mbl[4:0] at the rate determined by mfade and mfade0 bits. the total fade time is determined by the number of steps between old and new backlight values, in table 4, multiplied by the rate of fade in ms/step. backlight grouping confguration (05h) this register assigns the leds to the back light bank confgurations. bits [d5:d2] these bits are unused and are always zeros, so the maximum pulse count for this register is 3. mb1 and mb0 [d1:d0] these bits are used to set the number of led drivers dedi - cated to each backlight group. this allows the device to drive up to three different sets of leds with different current settings. note that any driver assigned to any led group can still be disabled independently if not needed. the code set by these bits determines how the led drivers are assigned among the three led groups according to the assignments listed in table 8. default state for each of these three bits is 0 (all leds assigned to main display). tablef8ffbacklightfgroupingfconfguration mb1 mb0 main display led drivers sub display led drivers third display led drivers 0 0 bl-bl4 0 bl-bl3 bl4 0 bl-bl2 bl3-bl4 bl-bl2 bl3 bl4
2 outline drawing mlpq-ut-14 2x2 . 020 . 006 . 010 . 000 . 077 n aaa bbb l e d e a 2 a 1 b . 012 . 016 bsc . 004 . 003 14 . 008 (. 006 ) . 079 - min dim nom inches - 0 . 60 0 . 50 0 . 40 bsc ( 0 . 152 ) 0 . 25 14 0 . 10 0 . 08 0 . 30 0 . 15 1 . 95 0 . 00 0 . 20 2 . 00 - 0 . 35 0 . 25 2 . 05 0 . 05 nom millimeters min max 1 . 95 2 . 00 2 . 05 . 077 . 079 . 081 l 1 . 014 . 016 . 018 0 . 35 0 . 40 0 . 45 a 1 bxn 0 . 20 0 . 15 notes : controlling dimensions are in millimeters ( angles in degrees ). 1 . pin 1 indicator ( laser mark ) a b aaa c c seating plane bbb c a b 1 n d e a a 2 e / 2 e e / 2 d / 2 . 010 max dimensions . 014 . 002 . 024 . 081 a - l 1 lxn SC658
semtech corporation power management products division 200 flynn road, camarillo, ca 930 2 phone: (805) 498-2 fax: (805) 498-3804 www.semtech.com contact information 22 land pattern mlpq-ut-14 2x2 millimeters dim inches (. 079 ) x y z g c p . 008 . 102 . 024 . 016 . 055 0 . 40 0 . 20 1 . 40 ( 2 . 00 ) 2 . 60 0 . 60 dimensions square package - dimensions apply in both " x " and " y " directions . controlling dimensions are in millimeters ( angles in degrees ). this land pattern is for reference purposes only . consult your manufacturing group to ensure your company ' s manufacturing guidelines are met . notes : 3 . 1 . 2 . y p ( c ) g x 4 . pin 1 pad can be shorter than the actual package lead to avoid solder bridging between pins 1 & 14 . r . 004 0 . 10 r z SC658

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